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  marvell. moving forward faster doc. no. mv-s104861-00, rev. - november 28, 2007 document classification: proprietary cover 88em8011 power factor correction controller datasheet patents, patents pending including us pat. nos. 7,266,001 and 7,292,013
document conventions note: provides related information or information of special importance. caution: indicates potential damage to hardware or software, or loss of data. warning: indicates a risk of personal injury. document status doc status: 2.00 technical publication: 0.xx for more information, visit our website at: www.marvell.com disclaimer no part of this document may be reproduced or transmitted in any form or by any means, electronic or mechanical, including phot ocopying and recording, for any purpose, without the express written permission of marvell. marvell retains the right to make changes to this document at any time, with out notice. marvell makes no warranty of any kind, expressed or implied, with regard to any information contained in this document, including, but not limited to, the impli ed warranties of merchantability or fitness for any particular purpose. further, marvell does not warrant the accuracy or completeness of the information, text, graphics, or other items contained within this document. marvell products are not designed for use in life-support equipment or applications that would cause a life-threatening situati on if any such products failed. do not use marvell products in these types of equipment or applications. with respect to the products described herein, the user or recipient, in the absence of appropriate u.s. government authorizati on, agrees: 1) not to re-export or release any such information consisting of technology, software or source code controlled for national s ecurity reasons by the u.s. export control regulations ("ear"), to a national of ear country groups d:1 or e:2; 2) not to export the direct product of such technology or such software, to ear country groups d:1 or e:2, if such technology o r software and direct products thereof are controlled for national security reasons by the ear; and, 3) in the case of technology controlled for national security reasons under the ear where the direct product of the technology is a complete plant or component of a plant, not to export to ear country groups d:1 or e:2 the direct product of the plant or major component thereof, if such direct produ ct is controlled for national security reasons by the ear, or is subject to controls under the u.s. munitions list ("usml"). at all times hereunder, the recipient of any such information agrees that they shall be deemed to have manually signed this doc ument in connection with their receipt of any such information. copyright ? 2007. marvell international ltd. all rights reserved . marvell, the marvell logo, moving forward faster, alaska, fas twriter, datacom systems on silicon, libertas, link street, netgx, phyadvantage, prestera, raising the technology bar, the technology within, virtual cable tester, and yukon are registered trademarks of marvell. ants, anyvoltage, discovery, dsp switcher, feroceon, galnet, galt is, horizon, marvell makes it all possible, radlan, unimac, an d vct are trademarks of marvell. all other trademarks are the property of their respective owners. 88em8011 datasheet doc. no. mv-s104861-00 rev. - copyright ? 2007 marvell page 2 document classification: proprietary november 28, 2007, 2.00
88em8011 power factor correction controller datasheet copyright ? 2007 marvell doc. no. mv-s104861-00 rev. - november 28, 2007, 2.00 document classification: proprietary page 3 product overview the marvell ? 88em8011 is a high performance, low-cost with minimum component count power factor correction (pfc) controller. the device is used for universal pfc front-end boost converter in systems or standalone products with power ranges between 10w?250w. the 88em8011 includes marvell?s patented (patent numbers 7266001b1 and 7292013b1) mixed mode control (mmc) that ensures th e lowest total harmonic distortion (thd) in the industr y. the average continuous conduction mode (ccm) also is available as an option. the device has multiple switching frequency options to provide a variety of applicat ions. the powerful adaptive driver self-adjusting featur e allows flexibility for application in a wide range of mosfet sizes. the 88em8011 controller impr oves the steady state and transient performance through marvell's innovative digital signal processing (dsp) solution. the combination of the mmc built on top of the dsp solution elevates industry standards for pfc controllers. the proprietary adaptive over current protection ability ensures constant power constraint. the safety provisions include open loop and high voltage protection protocol. the 8-pin soic and dip packages provide simple application by minimizing requirements for external components as well as board space. this guarantees simple system design at a minimum cost making the 88em8011 the best choice for any pfc application. general features ? patented dsp control strategy ? advanced mmc that utilizes ccm and discontinuous conduction mode (dcm) operation ? high power factor and low harmonics performance for wide range of load conditions ? fast dynamic performance during input and load transient state ? adaptive over current protection for universal voltage level to provide constant power characteristic ? open loop protection ? adaptive gate driver for applications between 10w?250w ? programmable switching frequency selective from 33.5 khz up to 280 khz ? optimized total solution to reduce emi and filter size ? minimal external components required ? thermal shutdown ? built-in under voltage lockout (uvlo) ? over voltage protection (ovp) ? oinput line frequency range from 45hz-65hz applications ? universal front-end pfc boost controller ? electronic ballast with pfc ? any two-stage power supply with front-end pfc boost pfc controller circuit diagram marvell pfc controller emi filter gnd 22 f vdc 0.047 f fuse 200 k v in l pgnd sw sgnd v dd i sns v in 1 2 3 4 5 6 7 8 +12v f set fb/en 88em8011 6 k 200 k 200 k 0.2 5.36 k 332 k 332 k 332 k sdi/ f set 10
88em8011 datasheet doc. no. mv-s104861-00 rev. - copyright ? 2007 marvell page 4 document classification: proprietary november 28, 2007, 2.00 table 1: feature differences soft start control natural ramp level 1 level 2 level 3 relative ramp up speed no slow down slow down slow down slow down
table of contents copyright ? 2007 marvell doc. no. mv-s104861-00 rev. - november 28, 2007, 2.00 document classification: proprietary page 5 table of contents product overview ............................................................................................................... ........................ 3 table of contents .............................................................................................................. ......................... 5 list of figures................................................................................................................ ............................. 7 list of tables ................................................................................................................. ............................. 9 1 signal description ............................................................................................................ ........... 11 1.1 pin configuration........................................................................................................... ..................................11 1.2 pin description ............................................................................................................. ...................................12 2 electrical specificati ons ..................................................................................................... ........ 13 2.1 absolute maximum ratings ........ ........................................................................................... ........................13 2.2 recommended operating conditions ............. .............. .............. .............. .............. ........... ............ .................14 2.3 electrical characteristics ........................... ...................................................................... ...............................15 3 functional description........................................................................................................ ........ 19 3.1 overview .................................................................................................................... .....................................19 3.2 signal process and functions............................ .................................................................... .........................20 3.3 flow chart and state diagram ....... .............. .............. .............. .............. ............ ........... .......... ........................21 3.3.1 under voltage lockout ..................................................................................................... ................21 3.3.2 standby mode.............................................................................................................. .....................22 3.3.3 enable mode............................................................................................................... ......................22 3.3.4 soft start mode ........................................................................................................... ......................22 3.3.5 adaptive driver gate charge evaluation ........... ......................................................................... ......22 3.4 normal boost operation modes ... ............................................................................................. ......................22 3.4.1 mixed mode control........................................................................................................ ..................22 3.4.2 average current mode ...................................................................................................... ...............23 3.5 marvell pfc controller functional blocks.................................................................................... ...................24 3.5.1 oscillator ................................................................................................................ ...........................24 3.5.2 current amplifier and current protection.................................................................................. ........24 3.5.3 output voltage level detect .. ............................................................................................. ..............24 3.5.4 line voltage zero cross detect...................... ...................................................................... ............25 3.5.5 multiplex switch and adc .................................................................................................. ..............26 3.5.6 state machine ............................................................................................................. ......................26 3.5.7 protection................................................................................................................ ..........................26 3.5.8 dsp core.................................................................................................................. ........................27 3.5.9 serial data interface and frequency setting ........ ....................................................................... .....27 3.5.10 adaptive driver .......................................................................................................... .......................28 4 functional characteristics .................................................................................................... ..... 29 4.1 v dd waveforms .................................................................................................................... ..........................29 4.2 v fb waveforms for enable/shutdown..... ............................................................................................ ............32
88em8011 datasheet doc. no. mv-s104861-00 rev. - copyright ? 2007 marvell page 6 document classification: proprietary november 28, 2007, 2.00 4.3 v fb waveforms for over voltage protection................. ........................................................................ ..........33 4.4 switching frequency waveform................................................................................................ ......................34 4.5 over current threshold waveform ....................... ...................................................................... ....................35 5 typical characteristics ........ ............................................................................................... ........ 37 5.1 input sinusoidal voltage .................................................................................................... .............................37 5.2 startup with soft start ..................................................................................................... ................................38 5.3 load transient .............................................................................................................. ..................................39 6 applications information ...................................................................................................... ...... 41 6.1 pfc boost performance with 88em8011 pfc controller ic ....................................................................... ...41 6.2 current sense resistor ...................................................................................................... .............................41 6.3 input/output voltage divider ................................................................................................ ...........................42 6.4 gate circuit ................................................................................................................ .....................................43 6.5 schematic and layout guidelines............................................................................................. ......................43 6.5.1 pc board layout example ................................................................................................... ............45 6.6 bill of materials ........................................................................................................... .....................................48 7 mechanical drawings .......................................................................................................... ....... 51 8 part order numbering/package marking .............. .................................................................... 55 8.1 part order numbering ........................................................................................................... .......................55 8.2 package markings............................................................................................................ ...............................56 a revision history .............................................................................................................. ............ 57
list of figures copyright ? 2007 marvell doc. no. mv-s104861-00 rev. - november 28, 2007, 2.00 document classification: proprietary page 7 list of figures product overview ............................................................................................................... ........................ 3 1 signal description ............................................................................................................ ............... 11 figure 1: 8-pin dip package?top view ............................................................................................ .............11 2 electrical specifications .... ................................................................................................. ............ 13 3 functional description........................................................................................................ ............ 19 figure 2: top level block diagram............................................................................................... ...................19 figure 3: signal process diagram of 88em8011 pfc contro ller ....................................................................2 0 figure 4: flow chart and state diagram ............ .............. .............. .............. .............. ........... ........... ...............21 figure 5: switching current waveform for traditional ccm control vs. mixed mode control ........................23 figure 6: current amplifier and protection block ........ ........................................................................ .............24 figure 7: output voltage level detection block ......... ......................................................................... ............25 figure 8: zero cross detection block and signal .......... .............. .............. ........... ............ ........... ......... ...........25 figure 9: multiplex switch and adc .............................................................................................. ..................26 figure 10: dsp core............................................................................................................. .............................27 figure 11: adaptive driver ...................................................................................................... ...........................28 4 functional characteristics.................................................................................................... .......... 29 figure 12: i dd operation (idd_op) vs. v dd ......................................................................................................29 figure 13: i dd sleep (idd_slp) vs. v dd ...........................................................................................................29 figure 14: i dd vs. v dd (v dd_on threshold).......................................................................................................30 figure 15: power on threshold (vdd_on ) vs. temperature ......................................................................... ...30 figure 16: power off threshold of v dd (vdd_uvlo) vs. temperature ...........................................................30 figure 17: v dd uvlo hysteresis (vdd_uvlo_hys) vs. temperatur ei............................................................30 figure 18: i dd operation (idd_op) vs. temperature ........................................................................................31 figure 19: i dd sleep current (idd_slp) vs. temperature ............ ....................................................................31 figure 20: i dd vs. v fb (enable threshold) ........ .............. .............. .............. .............. .............. .............. ............32 figure 21: normal regulation reference (vfb_reg)vs. temp erature ............................................................32 figure 22: v fb enable threshold (vfb_en) vs. temperature....... ....................................................................32 figure 23: v fb enable hysteresis (vfb_en_hys) vs. temperature..................................................................32 figure 24: i dd vs. v fb (ovp threshold) ............................................................................................................33 figure 25: over voltage protection threshold (vfb_ovp) vs. temperature....................................................33 figure 26: over voltage protection hysteresis (vfb_ovp_hys.) vs. temperature..........................................33 figure 27: switching frequency vs. temperature .................................................................................. ...........34 figure 28: over current threshold (iover) vs. input voltag e vin peak value) .................................................35 figure 29: over current threshold (viover_th) vs. temper ature ................................................................... ..35 5 typical characteristics ...... ................................................................................................. ............ 37 figure 30: input sinusoidal at 110vrms .......................................................................................... ...................37
88em8011 datasheet doc. no. mv-s104861-00 rev. - copyright ? 2007 marvell page 8 document classification: proprietary november 28, 2007, 2.00 figure 31: input sinusoidal at 220vrms .......................................................................................... ...................37 figure 32: startup at 110vrms ................................................................................................... ........................38 figure 33: startup at 220vrms ................................................................................................... ........................38 figure 34: load transient at 110vrms ............................................................................................ ..................39 figure 35: load transient at 220vrms ............................................................................................ ..................39 6 applications information ...................................................................................................... .......... 41 figure 36: input/output voltage divider......................................................................................... ....................42 figure 37: circuit diagram of 60w pfc boost with 88em8011 controller ........................................................44 figure 38: 88em8011 pcb schematic ......................... ...................................................................... ...............45 figure 39: top layer silk screen (not to scale) ......... .............. .............. ........... ........... ........... ........... ...............45 figure 40: top layer copper traces (not to scale) ..... .......................................................................... ...........46 figure 41: bottom layer copper traces (not to scale) ... ......................................................................... .........47 figure 42: bottom layer silk screen (not to scale) .... .......................................................................... .............47 7 mechanical drawings .......................................................................................................... ........... 51 figure 43: 8-pin dip mechanical drawing ......................................................................................... ................51 figure 44: 8-pin soic mechanical drawing ............... ......................................................................... ..............53 8 part order numbering/package marking................. ...................................................................... 55 figure 45: 88em8011 sample ordering part number ........ ......................................................................... ......55 figure 46: 88em8011 package marking....................... ...................................................................... ...............56
list of tables copyright ? 2007 marvell doc. no. mv-s104861-00 rev. - november 28, 2007, 2.00 document classification: proprietary page 9 list of tables product overview ............................................................................................................... ........................ 3 table 1: feature differences .................................................................................................... ........................4 1 signal description ............................................................................................................ ................ 11 table 2: pin description........................................................................................................ ..........................12 2 electrical specifications .... ................................................................................................. ............. 13 table 3: absolute maximum ratings ......................... ...................................................................... ...............13 table 4: recommended operating condit ions............. .............. .............. .............. ........... ............ ......... ........14 table 5: electrical characteristics ........................ ..................................................................... .....................15 3 functional description........................................................................................................ ............. 19 4 functional characteristics.................................................................................................... ........... 29 5 typical characteristics ...... ................................................................................................. ............. 37 6 applications information ...................................................................................................... ........... 41 table 6: current sense resistor sele ction....................................................................................... ..............42 table 7: output voltage regulation (r2*r3)/(r1*r4) = c onstant ..................................................................4 3 table 8: 88em8011 bom ........................................................................................................... ....................48 7 mechanical drawings .......................................................................................................... ............ 51 table 9: 8-pin dip dimensions................................................................................................... ....................52 table 10: exposed pad dimensions (inc h)......................................................................................... .............53 table 11: 8-pin soic dimensions ................................................................................................. ...................54 8 part order numbering/package marking................. ....................................................................... 55 table 12: 88em8011 part order options ........................................................................................... ..............55 a revision history .............................................................................................................. ................. 57 table 13: revision history ...................................................................................................... ..........................57
88em8011 datasheet doc. no. mv-s104861-00 rev. - copyright ? 2007 marvell page 10 document classification: proprietary november 28, 2007, 2.00 this page intentionally left blank
signal description pin configuration copyright ? 2007 marvell doc. no. mv-s104861-00 rev. - november 28, 2007, 2.00 document classification: proprietary page 11 1 signal description 1.1 pin configuration figure 1: 8-pin dip package?top view 1 2 3 4 8 7 6 5 pgnd sgnd i sns sdi/f set sw v dd fb/en v in 88em8011 pin # pin name i/o pin function 1 pgnd gnd power ground 2 sgnd gnd signal ground 3i sns i current sense 4v in i voltage input 5 fb/en i feedback/enable/shutdown 6sdi/f set i/o serial data interface/frequency setting 7v dd s ic supply voltage 8sw o switch
88em8011 datasheet doc. no. mv-s104861-00 rev. - copyright ? 2007 marvell page 12 document classification: proprietary november 28, 2007, 2.00 1.2 pin description this section provides pin de scriptions for the 88em8011. table 2: pin description pin # description 1 power ground must be connected to the negative terminal of the output capacitor and to the source terminal of the boost mosfet. to avoid any switching noise interruption on signal processing, pgnd and sgnd remain isolated inside the ic. 2 signal ground must be connected to the power ground on the power board. quiet ground is available at the negative terminal of the output bulk capacitor. sgnd has dedicated trace and connections and provides noiseless environment for the signal processing. 3 current sense sense resistor varies from 0.05 at 250w rated power to 0.2 at 62.5w rated power. used for current shaping and for over current protection. 4 voltage input connects to resistive divider at input ac line ?phase? to gnd. voltage applied is a half rectified sine wave scaled down by the input resistive divider. voltage compared with a threshold reference is used to detect the zero-cross location of the input sine wave and synthesize (regenerate) the input sine wave. this sine wave is used to generate the current reference. 5 fb/en connects to the output resistive divider. fb/en serves as the feedback as well as enable the chip. it has an open collector connection. feedback : fb it is scaled down of the output voltage 450v/2.5v. output voltage regulation at 100% rated v fb_reg = 2.5v (adc process). enable threshold detection at v fb_en ( ta b l e 5 ). transition from soft start to normal regulation at 87.5% rated v fb . over voltage shuts down at 107% rated v fb . enable/shutdown : en at v fb >v fb_en ( table 5 ) ic is enabled. pulling this pin to low or v o electrical specifications absolute maximum ratings copyright ? 2007 marvell doc. no. mv-s104861-00 rev. - november 28, 2007, 2.00 document classification: proprietary page 13 2 electrical specifications 2.1 absolute maximum ratings table 3: absolute maximum ratings 1 note: stresses above those listed in absolute maximum ratings may cause permanent device failure. functionality at or above these limits is not implied. exposure to absolute maximum ratings for extended periods may affect device reliability. 1. exceeding the absolute maximum rating may damage the device. symbol parameter min max units v dd power supply (voltage to pgnd=sgnd) -0.3 18 v vi sns voltage at i sns pin -0.5 3 v v fset/sdi voltage at f set/sdi pin -0.3 5.5 v v in voltage at v in pin -0.3 5.5 v v fb/en voltage at v fb/en pin -0.3 5.5 v i sw driver current (instantaneous peak) 2 a ja thermal resistance soic-8 156.5 c/w thermal resistance dip-8 89.5 c/w t a operating ambient temperature boundary 2 2. specifications over the -40 c to 85 c operating temperature ranges are assu red by design, characterization and correlation with statistical process controls. -40 85 c t j junction temperature 125 c t stor storage temperature range -65 150 c v esd esd rating 3 3. devices are esd sensitive. handling prec autions recommended. human body model, 1.5 k in series with 100 pf. 2kv
88em8011 datasheet doc. no. mv-s104861-00 rev. - copyright ? 2007 marvell page 14 document classification: proprietary november 28, 2007, 2.00 2.2 recommended operating conditions table 4: recommended operating conditions 1 symbol parameter min typ max units t a operating ambient temperature 2 -40 85 c t j junction temperature -20 125 c 1. this device is not guaranteed to function outside the specified operating temperature range. 2. over the ?40 c to 80 c operating temperature ranges are assured by des ign, characterization, and correlation with statistical process controls.
electrical specifications electrical characteristics copyright ? 2007 marvell doc. no. mv-s104861-00 rev. - november 28, 2007, 2.00 document classification: proprietary page 15 2.3 electrical characteristics table 5: electrical characteristics note: a 12v supply voltage is applied and the ambient temperature (t a ) = 25c. symbol parameter conditions min typ max units v dd supply v dd supply voltage 8.0 12 16 v v dd_on v dd power on threshold 12.92 v v dd_uvlo v dd power off threshold (uvlo) after v dd is powered up and running 8.0 v v dd_uvlo_hys v dd_uvlo hysteresis 4.8 5 v i dd_slp v dd sleep current v dd = 12v v en < 0.2v 166.5 a i dd_op v dd operating current v dd = 12v; v en > 0.25v c gate = 1nf f sw = 140khz v in =0 5.94 ma thermal shutdown t sd thermal shutdown 150 c t sd_hys hysteresis for thermal shutdown 25 c adaptive output gate driver v g_hi minimum gate high voltage 1 v dd = 12v >8.5 v v g_lo maximum gate low voltage 2 <3.0 v rds_on gate drive resistance (for each array pmos) sourcing 75ma t=25 c 20.2 gate drive resistance (for each array nmos) sinking 20ma t=25 c 16.6 isw_pk driver peak current c gate = 10 nf v dd = 12 v 2.0 a t r rise time c gate = 1 nf 100 ns c gate = 10 nf 150 ns t f fall time c gate = 1 nf 100 ns c gate = 10 nf 150 ns d max maximum duty cycle 97 %
88em8011 datasheet doc. no. mv-s104861-00 rev. - copyright ? 2007 marvell page 16 document classification: proprietary november 28, 2007, 2.00 d min minimum duty cycle 3.0 % feedback/enable/overvoltage v fb_reg normal regulation reference at boost output rated voltage 2.5 v v fb_en v fb at enable threshold ic powered on by v dd_on . transition from sleep mode to ic enable at enable threshold of v fb_en 0.278 v v fb_shdn v fb at shutdown threshold ic powered on by v dd_on . transfer from ic enable to sleep mode at shutdown threshold of v fb 0.223 v v fb_en_hys v fb at enable hysteresis -- -- v v fb_ovp over voltage protection threshold at 107% of boost output rated voltage. 2.71 v v fb_ovp_hys ovp hysteresis 0.108 v current sensing and current protection 3 v iover_th1 over current threshold zone 1 4 peak value of half-sine voltage at v in : 1.26 electrical specifications electrical characteristics copyright ? 2007 marvell doc. no. mv-s104861-00 rev. - november 28, 2007, 2.00 document classification: proprietary page 17 f sw2 frequency/ set up 2 (average mode) r fset = 35k 70.8 khz (mixed mode) 71 142 khz f sw3 frequency/ set up 3 (average mode) r fset = 95k 140 khz (mixed mode) 140 280 khz serial data interface (sdi) 10 sdi maximum voltage level 2.5 3.3 5 v sdi maximum clock frequency 1 tbd mhz 1. considering the voltage drop on the internal driver mosfet during current sourcing. 2. considering the voltage drop on the intern al driver mosfet during current sinking. 3. to achieve almost constant power limit for the universal input range, current protection self-adjusts thresholds in four zones of input voltage levels. a margin of 50% compared to the rated current is considered for the threshold current values. 4. threshold of negative voltage drop across r sns due to instantaneous current 5. with input divider ratio of 6/606, these values are equivalent to 90 v rms 88em8011 datasheet doc. no. mv-s104861-00 rev. - copyright ? 2007 marvell page 18 document classification: proprietary november 28, 2007, 2.00 this page intentionally left blank
functional description overview copyright ? 2007 marvell doc. no. mv-s104861-00 rev. - november 28, 2007, 2.00 document classification: proprietary page 19 3 functional description 3.1 overview the 88em8011 is a high performance, low-cost with minimum component count power factor correction (pfc) controller. the device is used for universal pfc front-end boost converter in systems or standalone products with power ranges between 10w?250w. the high performance of 88em8011 is accompanied with its small size and simplicity of application. figure 2 shows the top level block diagram. figure 2: top level block diagram dsp core 88em8011 current amplifier mux switcher & adc output voltage level detect current protection threshold selection zero cross detect power distribution and bandgaps serial data interface startup setting or frequency setting over temperature adaptive driver current protection protection management clock i sns fb/en v in i_over i_over v o_over t _o ve r en/shdn v o_over sw sdi/ f set r_f set v dd oscillator fault driver disable state machine pgnd sgnd iover_th1,?,4 note ? r_f set is the frequency setting resistor. ? i over _th1,...4 are the over current threshold at different regions of the universal input voltage. ? i_over, v o_over , and t _over are the over current, over voltage, and over temperature signals respectively.
88em8011 datasheet doc. no. mv-s104861-00 rev. - copyright ? 2007 marvell page 20 document classification: proprietary november 28, 2007, 2.00 this page intentionally left blank
functional characteristics v dd waveforms copyright ? 2007 marvell doc. no. mv-s104861-00 rev. - november 28, 2007, 2.00 document classification: proprietary page 29 4 functional characteristics the following applies unless otherwise noted: v in = 60 hz half-wave sinusoidal from 0v to the peak voltage (v pk ) given in the test conditions of each graph. all measurement readings are typical. 4.1 v dd waveforms note: v_i sns is the voltage on the isns pin. figure 12: i dd operation (i dd _op) vs. v dd figure 13: i dd sleep (i dd _slp) vs. v dd test conditions: ? v in = 3v pk ? f sw = 140 hz ? v fb = 2.4v test conditions: ? v in = 0v ? f sw = 140khz ? v fb = 0v ? c gate = 1 nf ? v_i sns = 0v ? c gate = 1 nf ? v_i sns = 0v 0.000 1.000 2.000 3.000 4.000 5.000 6.000 7.000 0246810121416 vdd (v) idd_op (ma) idd_op, vdd rising idd_op, vdd falling 0.000 0.050 0.100 0.150 0.200 0.250 0246810121416 vdd (v) idd_slp (ma) idd_slp, vdd rising idd_slp, vdd falling
88em8011 datasheet doc. no. mv-s104861-00 rev. - copyright ? 2007 marvell page 30 document classification: proprietary november 28, 2007, 2.00 figure 14: i dd vs. v dd (v dd_on threshold) figure 15: power on threshold (v dd _on ) vs. temperature test conditions: ? v in = 0v ? f sw = 140khz ? v fb = 2.4v test conditions: ? v in = 0v ? f sw = 140khz ? v fb = 2.4v ? v_i sns = 0v ? c gate = 1nf ? c gate = 1 nf ? v_i sns = 0v figure 16: power off threshold of v dd (v dd _uvlo) vs. temperature figure 17: v dd uvlo hysteresis (v dd _uvlo_hys) vs. temperature i test conditions: ? v in = 0v ? f sw = 140khz ? v fb = 2.4v test conditions: ? v in = 0v ? f sw = 140khz ? v fb = 2.4v ? c gate = 1 nf ? v_i sns = 0v ? c gate = 1 nf ? v_i sns = 0v 0.000 1.000 2.000 3.000 4.000 5.000 6.000 7.000 6 8 10 12 14 16 vdd (v) idd (ma) idd, vdd rising idd, vdd falling 0 2 4 6 8 10 12 14 16 -40-200 20406080 temperature (c) vdd_on (v) vdd_on 0 2 4 6 8 10 12 14 16 -40-20 0 20406080 temperature (c) vdd thresholds (v) vdd_uvlo 0 2 4 6 8 10 12 14 16 -40-200 20406080 temperature (c) vdd thresholds (v) vdd_uvlo_hyst
functional characteristics v dd waveforms copyright ? 2007 marvell doc. no. mv-s104861-00 rev. - november 28, 2007, 2.00 document classification: proprietary page 31 figure 18: i dd operation (i dd _op) vs. temperature figure 19: i dd sleep current (i dd _slp) vs. temperature test conditions: ? v dd = 12v ? v_i sns = 0v ? v in = 2v pk test conditions: ? v dd = 12v ? v_i sns = 0v ? v in = 0v ? f sw = 140khz ? v fb = 2.4v ? c gate = 1 nf ? f sw = 140khz ? v fb = 0v ? c gate = 1 nf 0.000 1.000 2.000 3.000 4.000 5.000 6.000 7.000 -40 -20 0 20 40 60 80 temperature (c) idd_op (ma) idd_op 0.000 0.020 0.040 0.060 0.080 0.100 0.120 0.140 0.160 0.180 0.200 -40-200 20406080 temperature (c) idd_slp (ma) idd_slp
88em8011 datasheet doc. no. mv-s104861-00 rev. - copyright ? 2007 marvell page 32 document classification: proprietary november 28, 2007, 2.00 4.2 v fb waveforms for enable/shutdown figure 20: i dd vs. v fb (enable threshold) figure 21: normal regulation reference (v fb _reg)vs. temperature test conditions: ? v dd = 12v ? f sw = 37.5 khz ? v in = 0v test conditions: ? v dd = 12v ? v_i sns = 0v ? v in = 2v pk ? c gate = 1 nf ? v_i sns = 0v ? f sw = 37.5 khz ? v fb = 0v ? c gate = 1 nf figure 22: v fb enable threshold (v fb _en) vs. temperature figure 23: v fb enable hysteresis (v fb _en_hys) vs. temperature test conditions: ? v dd = 12v ? f sw = 37.5 khz ? v in = 0v test conditions: ? c gate = 1 nf ? v_i sns = 0v ? v dd = 12v ? f sw = 37.5 khz ? v in = 0v ? c gate = 1 nf ? v_i sns = 0v 0.000 0.500 1.000 1.500 2.000 2.500 3.000 3.500 4.000 4.500 5.000 0.000 0.050 0.100 0.150 0.200 0.250 0.300 0.350 0.400 0.450 0.500 vfb (v) idd (ma) idd, vfb falling idd, vfb rising 0.000 0.500 1.000 1.500 2.000 2.500 3.000 -40-200 20406080 temperature (c) vfb_reg (v) vfb_reg 0.000 0.050 0.100 0.150 0.200 0.250 0.300 0.350 0.400 -40-200 20406080 temperature (c) vfb_en, vfb enable threshold (v) vfb_en enable vfb_en disable 0.000 0.010 0.020 0.030 0.040 0.050 0.060 0.070 0.080 0.090 0.100 -40 -20 0 20 40 60 80 temperature (c) vfb_en_hys (v) vfb_en hysteresis
functional characteristics v fb waveforms for over voltage protection copyright ? 2007 marvell doc. no. mv-s104861-00 rev. - november 28, 2007, 2.00 document classification: proprietary page 33 4.3 v fb waveforms for over voltage protection figure 24: i dd vs. v fb (ovp threshold) figure 25: over voltage protection threshold (v fb _ovp) vs. temperature test conditions: ? v dd = 12v ? f sw = 140khz ? v in = 0v test conditions: ? v dd = 12v ? f sw = 140khz ? v in = 0v ? c gate = 1 nf ? v_i sns = 0v ? c gate = 1 nf ? v_i sns = 0v figure 26: over voltage protection hysteresis (v fb _ovp_hys.) vs. temperature test conditions: ? v dd = 12v ? f sw = 140khz ? v in = 0v ? c gate = 1 nf ? v_i sns = 0v 3.000 3.500 4.000 4.500 5.000 5.500 6.000 6.500 2.000 2.200 2.400 2.600 2.800 3.000 vfb (v) idd (ma) idd, vfb rising idd, vfb falling 0.000 0.500 1.000 1.500 2.000 2.500 3.000 -40 -20 0 20 40 60 80 temperature (c) vfb_ovp (v) vfb_ovp high vfb_ovp low 0.000 0.020 0.040 0.060 0.080 0.100 0.120 0.140 0.160 0.180 0.200 -40-20 0 20406080 temperature (c) vfb_ovp_hysteresis (v) vfb_ovp hyst
88em8011 datasheet doc. no. mv-s104861-00 rev. - copyright ? 2007 marvell page 34 document classification: proprietary november 28, 2007, 2.00 4.4 switching frequency waveform figure 27: switching frequency vs. temperature test conditions: ? v dd = 12v ? v_i sns = 0v ? v in = 0v ? v fb = 2.4v ? c gate = 1 nf freq1 rfset=10k ? freq2 rfset=35k ? freq3 rfset=95k ? 0 20,000 40,000 60,000 80,000 100,000 120,000 140,000 160,000 180,000 200,000 -40-200 20406080 temperature (c) frequency (hz) freq1 freq2 freq3
functional characteristics over current threshold waveform copyright ? 2007 marvell doc. no. mv-s104861-00 rev. - november 28, 2007, 2.00 document classification: proprietary page 35 4.5 over current threshold waveform figure 28: over current threshold (i over ) vs. input voltage v in peak value) test conditions: ? v dd = 12v ? f sw = 140khz ? v fb = 2.4v ? c gate = 1 nf figure 29: over current threshold (vi over _th) vs. temperature test conditions: ? v dd = 12v ? f sw = 140khz ? v fb = 2.4v ? c gate = 1 nf 0.100 0.150 0.200 0.250 0.300 0.350 0.400 0.450 0.200 1.200 2.200 3.200 4.200 vin (vpk) vsns_ocp (v) vcsup threshold -0.500 -0.450 -0.400 -0.350 -0.300 -0.250 -0.200 -0.150 -0.100 -0.050 0.000 -40-200 20406080 temperature (c) viover_th (v) viover_th1, vin = 1.5vp viover_th2, vin = 2.25vp viover_th3, vin = 3vp viover_th4, vin = 3.7vp
88em8011 datasheet doc. no. mv-s104861-00 rev. - copyright ? 2007 marvell page 36 document classification: proprietary november 28, 2007, 2.00
typical characteristics input sinusoidal voltage copyright ? 2007 marvell doc. no. mv-s104861-00 rev. - november 28, 2007, 2.00 document classification: proprietary page 37 5 typical characteristics 5.1 input sinusoidal voltage figure 30 shows the input sinusoidal voltage and current at steady state for full load (60w) and 110vrms input voltage for circuit diagram. figure 31 shows the input sinusoidal voltage and current at steady state for full load (60w) and 220vrms input voltage for circuit diagram. figure 30: input sinusoidal at 110vrms figure 31: input sinusoidal at 220vrms 0 0 ch3 500 ma ch4 200v m 4.0 ms 2.5 ms/s a ch4 / 148v 400 ns/pt ch3 500 ma ch4 200v m 4.0 ms 2.5 ms/s a ch4 / 148v 400 ns/pt 0 0
88em8011 datasheet doc. no. mv-s104861-00 rev. - copyright ? 2007 marvell page 38 document classification: proprietary november 28, 2007, 2.00 5.2 startup with soft start figure 32 shows the startup at 110vrms input voltage and full load (60w) and with natural soft start slope. figure 33 shows the startup at 220vrms input voltage and full load (60w) and with natural soft start slope. figure 32: startup at 110vrms figure 33: startup at 220vrms ch3 1.0a ch2 200v ch4 200v m 40 ms 250 ks/s a ch4 / 148v 4.0 s/pt 0 0 0 ch3 1.0a ch2 200v ch4 500v m 40 ms 250 ks/s a ch4 / 150v 4.0 s/pt 0 0 0
typical characteristics load transient copyright ? 2007 marvell doc. no. mv-s104861-00 rev. - november 28, 2007, 2.00 document classification: proprietary page 39 5.3 load transient figure 34 shows the load transient test from full to half load and vise versa at 110vrms input voltage for the circuit diagram. overshoot and unde rshoot during transient remain below 10%. figure 35 shows the load transient test from full to hal f load and vise versa at 220vrms input voltage for the circuit diagram. overshoot and unde rshoot during transient remain below 8%. figure 34: load transient at 110vrms figure 35: load transient at 220vrms ch3 1.0a ch2 200v ch4 200v m 100 ms 1.0 ms/s a ch2 / 452v 1000 ns/pt 0 0 0 ch3 1.0a ch2 200v ch4 500v m 100 ms 250 ks/s a ch2 / 452v 4.0 s/pt 0 0 0
88em8011 datasheet doc. no. mv-s104861-00 rev. - copyright ? 2007 marvell page 40 document classification: proprietary november 28, 2007, 2.00 this page intentionally left blank
applications information pfc boost performance with 88em8011 pfc controller ic copyright ? 2007 marvell doc. no. mv-s104861-00 rev. - november 28, 2007, 2.00 document classification: proprietary page 41 6 applications information 6.1 pfc boost performance with 88em8011 pfc controller ic marvell?s mixed mode control technique improves performance of the boost converter by adopting advantages of both pwm and pfm control techni ques. operation mode changes from pwm near peak area of the line cycle with fixed frequency, to pfm near the zero crossing area. the frequency for pfm mode is increased from the base frequency of pwm mode up to two times the base frequency. the boost converter achieves: ? reduced hf ripple current and filter size comp ared to the conventional dcm and critical mode ? reduced switching loss and improved efficiency compared to the ccm ? improved pf and reduced thd for the line current compared to the dcm or ccm ? smaller value of boost inductor compared to the conventional ccm boost converters other advanced benefits for t he boost power board include: ? efficient safe charge pump for any applicable mosfet on the board (10w to 250w) by the powerful smart adaptive driver. ? selective frequency range of operation from 37.5 khz up to as high as 300 khz based on application. ? adaptive over current protection that detects voltage level of the universal input and self adjusts the current limit reference for an almost constant source power. ? precise output regulation wi th low output tolerance. ? simplified application and minimized component coun t resulting in lower cost and size of the power board. ? no zero current detection. secondary winding on the boost inductor can be used for the vdd supply in a standalone front-end pfc product. ? boost output over volt age protection (ovp). only a current sense resistor with input and output resistive voltage dividers provide all the required signals from the power board to the controller ic . the following sections give the guidelines for choosing these components. 6.2 current sense resistor the voltage drop on the current sense resistor shoul d be kept very small. the sense resistor is calculated based on the input rated power and a mi nimum ac voltage of 90vrms for a fixed voltage drop of 140 mv at the rated current. the voltage sensed on pin i sns at different loadings is independent of the rated current. the ic current loop responds to the normalized value (percentage) of the current independent of the power board rated power. table 6 shows the current sense resistor selection guide based on the rated power boost power board. the rated power dissipation of the sense resistor is selected based on boost-rated power with enough margin (1w resistor for 60w application).
88em8011 datasheet doc. no. mv-s104861-00 rev. - copyright ? 2007 marvell page 42 document classification: proprietary november 28, 2007, 2.00 6.3 input/output voltage divider to select input/output dividers, an appropriate combination based on the size and voltage/power rating of resistors should be considered. for a 450v dc bus application, the outpu t divider consists of r3 = 3x332 k at high voltage side and r4 = 5.60 k at the ic pin fb. input divider consists of r1 = 3x200 k and r2 = 6.04 k at the ic pin v in . calculations inside the ic are based on the predef ined specific relation between input/output sensed voltages. to save this ratio the following relation should always be satisfied: by changing the output divider ratios (reference co nstant 2.5v), the output voltage regulation should be adjusted from 450v to 200v (cons idering that output should always be greater than peak of input voltage). for instance, with fixed r3 = 996 k , choosing r4 = 6.26 k gives sensed voltage of 2.5v at v out = 400v. r4 =12.60 k gives the sensed voltage of 2.5v at v out =200v. with an input voltage of 110 vrms, adjustment fo r the output divider ratio and dc bus regulated voltage are summarized in table 7 . table 6: current sense resistor selection input rated power (w) 62.5 125 187.5 250 current sense resistor ( ) 0.2 0.1 0.065 0.05 figure 36: input/output voltage divider pfc ic 0 0 r2 r1 r4 r3 v in v_fb v in v out r 2 r 3 ? r 1 r 4 ? ------------------ cons t tan =
applications information gate circuit copyright ? 2007 marvell doc. no. mv-s104861-00 rev. - november 28, 2007, 2.00 document classification: proprietary page 43 note: the resistor values in this table are only suggested values. they can change as long as the main mandatory ratio is satified. 6.4 gate circuit a 20 resistor is connected between the sw pin to the gate of the external mosfet switch for the purpose of dampening the current being charged or discharged from the input capacitor of the mosfet. 6.5 schematic and layout guidelines the following guidelines are the recommended poi nts that help increase the boost power board performance. 1. the output loop consisting of the boost mosfet , boost diode, and the output bulk capacitor is subject to fast rise of switching current. the length of this loop must be minimized on the power board layout design. any parasitic inductance in this path in conjunction with the mosfet parasitic capacitor could cause unwanted oscillat ions. these unwanted oscillations in addition to extra stress on the devices are a so urce of loss and reduced efficiency. 2. output electrolytic capacitor is selected based on the output ripple limit or the hold-on time of the dc voltage bus. esr of the output capacitor must be very low to avoid power loss and heat dissipation. 3. for a 450v dc bus, a minimum voltage rating of 500v for the output capacitor is required. if the cost consideration encourages using two electrolytic capacitors of 250v in series, then precautions must be kept in mind. dc leakage current due to the material and age of the capacitors is unavoidable. to avoid unbalance voltage across the series capacitors due to the leakage, a resistor netwo rk with connection of the center point to the midpoint of the capacitors is recommended. 4. the bulk electrolytic capacitor cannot bypass the very fast switching oscillation. to reduce stress and power loss due to the switching oscillations, a high voltage polypropylene capacitor of small value about 10 nf to 33 nf is recommended. this capacitor should directly be laid out from cathode of the boost diode to the source of boost mosfet. 5. some designers preferably add a high voltage ceramic capacitor of about 50?100 pf across the boost mosfet to bypass the emi frequency osci llations. however, the output capacitor of the mosfet could partially perform the same duty. this external capacitor in many designs is ignored. 6. to reduce the reverse recovery stress of the boost diode on the mosfet, switch turn on is recommended to use an ultra fast or recove ry-less boost diode. lower current rating with table 7: output voltage regulation (r2*r3)/(r1*r4) = constant v out (v) r1 (k ) r2 1 (k ) r3 (k ) r4 1 (k ) kin = r2/r1 kout = r4/r3 kin/kout 450 600 6.04 996 5.60 0.0100 0.0056 1.8 400 600 6.80 996 6.26 0.0113 0.0063 1.8 350 600 7.69 996 7.15 0.0129 0.0072 1.8 300 600 9.00 996 8.35 0.0151 0.0084 1.8 250 600 10.90 996 10.00 0.0181 0.0101 1.8 200 600 13.70 996 12.60 0.0228 0.0127 1.8 1. these given values are based on t he nearest standard resistor values.
88em8011 datasheet doc. no. mv-s104861-00 rev. - copyright ? 2007 marvell page 44 document classification: proprietary november 28, 2007, 2.00 smaller die size is preferred. however, duri ng the power on, the inrush current through this diode to charge the bulk electrolytic capacitor could exceed the safety ratings of the diode. in such cases, a general purpose fast recovery di ode across the boost inductor plus boost diode is added. this inrush bypass diode could help avoid the saturation of the inductor and any damage to the boost diode during the power on. figure 37 shows the pcb schematic with an internal v dd supply circuitry from a secondary winding on boost inductor. figure 37: circuit diagram of 60w pfc boost with 88em8011 controller universal ac input gnd lboost 800 h 0.2 ? isns dboost stth806 dti 450vdc +12 v 88em8011 f 3a 5 6 4 2 7 1 8 pgnd sw isns sdi / fset fb/en vin mboost stp 8nm60 sgnd vdd 3 vin vfb c out & balance resistors 200 k 200 k 200 k 1m 1m 976k 16.5k 6.04k emi filter rectified bus 0.22 f 305 v 0.22 f 305 v 0.01 f 630 vdc 47 f 250 vdc 47 f 250 vdc sec 2 sec 1 common mode epcos - b82732 f s1m s1m s1 m s1m 1 f inrush bypass diode 500k 500k output divider input divider 100k 1/4w 10 ? 1/4w 100k 1/4w 1n914 1 n914 4.7 f 4.7 f rectified bus sec1 sec2 15v 1w 47 f 25vdc +12 v internal vdd supply 500k 500k r fs et 10 k 47pf 630vdc + 200 ? 10 ?
applications information schematic and layout guidelines copyright ? 2007 marvell doc. no. mv-s104861-00 rev. - november 28, 2007, 2.00 document classification: proprietary page 45 6.5.1 pc board layout example the following layout example is based on the schematic in figure 38 . ? actual board size = 3650 mil x 1100 mil; area = 4.015 in 2 ? total copper layers = 2 (top layer, bottom layer) figure 38: 88em8011 pcb schematic figure 39: top layer silk screen (not to scale) 10 ?
88em8011 datasheet doc. no. mv-s104861-00 rev. - copyright ? 2007 marvell page 46 document classification: proprietary november 28, 2007, 2.00 figure 40: top layer copper traces (not to scale)
applications information schematic and layout guidelines copyright ? 2007 marvell doc. no. mv-s104861-00 rev. - november 28, 2007, 2.00 document classification: proprietary page 47 figure 41: bottom layer copper traces (not to scale) figure 42: bottom layer silk screen (not to scale)
88em8011 datasheet doc. no. mv-s104861-00 rev. - copyright ? 2007 marvell page 48 document classification: proprietary november 28, 2007, 2.00 6.6 bill of materials table 8: 88em8011 bom item qty ref manufacturer part # manufacturer description 1 2 c1,c2 b32922c3224m epcos inc. cap .22uf 305vac emi suppression 2 1 c3 eeu-fc1e470 panasonic cap 47uf 25v elect fc radial 3 2 c4,c5 eeu-eb2e470 panasonic cap 47uf 250v elect eb radial 41c6 no load 5 2 c7,c8 ecj-3yb1e475k panasonic cap 4.7uf 25v ceramic x5r 1206 6 1 c9 ecj-1vb1e104k panasonic cap ceramic 0. 1uf 25v x5r 0603 71c10 no load 8 2 d1,d2 1n914tr fairchild diod e ss hi cond100v 200ma do-35 9 1 d3 1n4744a-tp micro commercial diode zener 1w 15v d041 10 1 d4 stth806dti st microelectroni cs diode boost 600v 8a to-220ab 11 4 d5,d6,d7,d8 s1m-13 diodes inc. glass passivated diode 1000v 1a sm 12 1 f1 f1001ct-nd littlefuse fus e 3a/350v fast smt ebf 13 2 j1,j2 ed4101/3-kd ost terminal block 5mm 3pos pcb 14 1 q1 stp8nm60 st microelectronics mo sfet n-chan 65 0v 8a to-220 15 2 r1,r2 erd-s2tj104v panasonic res 100k ohm carbon film 1/4w 5% 16 1 r3 erd-s2tj100v panasonic res 10 ohm carbon film 1/4w 5% 17 3 r4,r5,r6 erj-6enf2003v panasonic res 200k ohm 1/8w 1% 0805 smd 18 1 r7 erj-3ekf6041v panasonic res 6.04k ohm 1% 0603 smd 19 1 r8 erj-6enf2000v panasonic res 200 ohm 1/8w 1% 0805 smd 20 1 r9 wsl2512r3000f ea vishay res 0.30 ohm 1w 1% 2512 smd 21 1 r10 erj-6enf9763v panasonic res 976k ohm 1/8w 1% 0805 smd 22 1 r11 erj-3ekf1652v panasonic res 16.5k ohm 1/10w 1% 0603 smd 23 1 r12 erj-3ekf9092v panasonic res 90.9k ohm 1/10w 1% 0603 smd 24 2 r13,r15 erj-6enf1004v panasonic res 1.00m ohm 1/8w 1% 0805 smd
applications information bill of materials copyright ? 2007 marvell doc. no. mv-s104861-00 rev. - november 28, 2007, 2.00 document classification: proprietary page 49 25 1 r14 erj-6enf1002v panasonic res 10.0k ohm 1/8w 1% 0805 smd 26 1 r-gate erj-3ekf10r0v panasonic res 10.0 ohm 1/10w 1% 0603 smd 27 1 tp1 2508-2-00-44-00-0 0-07-0 mil-max swage mount terminal 28 1 t1 b82732f2601b00 1 epcos inc. epcos 07076 29 1 t2 boostchoke with secondary 30 1 u1 mrvl-88bl011 marvell pfc chip table 8: 88em8011 bom (continued) item qty ref manufacturer part # manufacturer description
88em8011 datasheet doc. no. mv-s104861-00 rev. - copyright ? 2007 marvell page 50 document classification: proprietary november 28, 2007, 2.00 this page intentionally left blank
mechanical drawings copyright ? 2007 marvell doc. no. mv-s104861-00 rev. - november 28, 2007, 2.00 document classification: proprietary page 51 7 mechanical drawings figure 43: 8-pin dip mechanical drawing note ? controlling dimension: inch ? dimension shown do not include mold flash or other protrusion. ? the maximum allowable molding flash is 0.006? or protrusion on any side. ? see section 8, part order numberi ng/package marking, on page 55 for package marking and pin 1 location.
88em8011 datasheet doc. no. mv-s104861-00 rev. - copyright ? 2007 marvell page 52 document classification: proprietary november 28, 2007, 2.00 table 9: 8-pin dip dimensions symbol dimensions in mm dimensions in inch min nom max min nom max a 3.60 3.90 4.20 0.142 0.154 0.165 a1 0.38 -- -- 0.015 -- -- a2 3.25 3.30 3.35 0.128 0.130 0.132 b 0.36 0.46 0.56 0.014 0.018 0.022 b1 1.45 1.60 1.73 0.057 0.063 0.068 b2 0.81 0.99 1.17 0.032 0.039 0.046 c 0.25 0.28 0.30 0.010 0.011 0.012 d 9.53 9.65 9.78 0.375 0.380 0.385 e 7.62 7.87 8.13 0.300 0.310 0.320 e1 6.22 6.35 6.48 0.245 0.250 0.255 e--2.54----0.100-- l 3.18 0.71 3.43 0.125 0.028 0.135 eb 8.38 -- 9.40 0.330 -- 0.370 8 12 14 8 12 14
mechanical drawings copyright ? 2007 marvell doc. no. mv-s104861-00 rev. - november 28, 2007, 2.00 document classification: proprietary page 53 figure 44: 8-pin soic mechanical drawing table 10: exposed pad dimensions (inch) exposed pad dimension (inch) pad size option d2 e2 min nom max min nom max a.) 95x130mil 0.105 -- -- 0.070 -- --
88em8011 datasheet doc. no. mv-s104861-00 rev. - copyright ? 2007 marvell page 54 document classification: proprietary november 28, 2007, 2.00 table 11: 8-pin soic dimensions symbol dimensions in mm dimensions in inch min nom max min nom max a 1.47 1.60 1.73 0.058 0.063 0.068 a1 0.10 -- 0.25 0.004 -- 0.010 a2 -- 1.45 -- -- 0.057 -- b 0.33 0.41 0.51 0.013 0.016 0.020 c 0.19 0.20 0.25 0.0075 0.008 0.0098 d 4.80 4.85 4.95 0.189 0.191 0.195 e 5.80 6.00 6.20 0.228 0.236 0.244 e1 3.80 3.90 4.00 0.150 0.154 0.157 e--1.27----0.050-- l 0.40 0.71 1.27 0.016 0.028 0.050 y -- -- 0.076 -- -- 0.003 0 -- 8 0 -- 8 note 1. all dimensions in inch. 2. lead frame material: copper 194. 3. dimension ?d? does not include mold flash, tie bar burrs, and gate burrs. dimension shall not exceed 0.006? (0.1 5 mm) per end. dimension ?e1? does not include interlead flash. interlead flash shall not exceed 0.010? (0.25 mm) per side. 4. dimension ?b? does not include dambar protrusion. allowable dambar protrusion shall be 0.003? (0.08 mm) total in excess of the ?b? dimension at maximum material condition. dambar cannot be located on the lower radius or the foot. minimum space between protrusion and an adjacent lead to be 0.0028? (0.07 mm). 5. tolerance: 0.010? (0.25 mm) unless otherwise specified. 6. otherwise dimension follow acceptable specification.
part order numberi ng/package marking part order numbering copyright ? 2007 marvell doc. no. mv-s104861-00 rev. - november 28, 2007, 2.00 document classification: proprietary page 55 8 part order numbering/package marking 8.1 part order numbering figure 45 shows the part order numbering scheme for the 88em8011 series. for complete ordering information, contact your marvell fae or sales representative. the standard ordering part number for the respective solution is shown in ta b l e 1 2 . figure 45: 88em8011 sample ordering part number ?xx?xxx2c000?xxxx part number package code environmental code + = rohs 0/6 ? = rohs 5/6 1 = rohs 6/6 2 = green halogen free temperature code c = commercial custom code (optional) 88em8011 custom code custom code custom code table 12: 88em8011 part order options package type part order number 8-pin dip package 88em8011-a0-pda-c000-xxxx 8-pin soic package 88e m8011-a0-sae2c000-xxxx
88em8011 datasheet doc. no. mv-s104861-00 rev. - copyright ? 2007 marvell page 56 document classification: proprietary november 28, 2007, 2.00 8.2 package markings figure 46 shows a typical package marking and pin 1 location for the part. figure 46: 88em8011 package marking 8011 yww$ marvell logo date code, assembly plant code yww = date code (y = last digit of year, ww = work week) $ = assembly code part number note: the above drawing is not drawn to scale. location of markings is approximate. pin 1
copyright ? 2007 marvell doc. no. mv-s104861-00 rev. - november 28, 2007, 2.00 document classification: proprietary page 57 a revision history table 13: revision history document type document revision release rev. ? draft
marvell. moving forward faster marvell semiconductor, inc. 5488 marvell lane santa clara, ca 95054, usa tel: 1.408.222.2500 fax: 1.408.752.9028 www.marvell.com back cover


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